Method and circuit arrangement for reading out and

专利名称：Method and circuit arrangement for reading

out and for storing binary memory cellsignals

发明人：Athanasia Chrysostomides,Sabine

Kling,Peter Pfefferl,DominiqueSavignac,Helmut Schneider

申请号：US10150340申请日：20020517

公开号：US20030012061A1公开日：20030116

专利附图：

摘要：The invention provides a method in which a binary memory cell signal from a;least one memory cell is applied to at least one bit line pair (), the binary memory cellsignal from the memory tell is switched through via the bit line pair () to at least onesense amplifier (), a binary output signal of the sense amplifier () is switched through to alocal data line pair () as a binary intermediate signal, the binary intermediate signal on thelocal data line pair () is switched through to at least one main data line pair () by means ofa main data line switching transistor pair () in a manner dependent on a row control signalfed via a row control line (), the main data line switching transistor pair () being arrangedin the through-plating regions formed between the memory cell arrays.

申请人：CHRYSOSTOMIDES ATHANASIA,KLING SABINE,PFEFFERL PETER,SAVIGNACDOMINIQUE,SCHNEIDER HELMUT

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